1. Field of the Invention
The present invention relates to data transmission networks and, in particular, to a method and apparatus for encoding information received by a station from a network transmission medium for presentation to a receiving station or for repetition back onto the medium in a reliable, compact and timely manner.
2. Discussion of the Prior Art
Communication between stations in a data transmission network occurs through the transmission of a series, or "frame", of information characters, with adjacent frames being separated by explicit or implicit start-stop code patterns. The use of a unique start pattern ("start delimiter") and a unique stop pattern ("end delimiter") allows the receiving station to identify the exact beginning and the exact end of each received frame.
A particular type of network format is defined by the Fiber Distributed Data Interface (FDDI) protocol. The FDDI protocol is an American National Standard (ANS) for data transmission which applies to a 100 Mbit/second token ring network that utilizes an optical fiber transmission medium. The FDDI protocol is intended as a high performance interconnection among computers as well as among computers and their associated mass storage sub-systems and other peripheral equipment.
Information is transmitted on an FDDI ring in frames that consist of a sequence of 5-bit characters or "symbols" with each symbol representing 4 data bits. Information is typically transmitted in symbol pairs or "bytes". Tokens are used to signify the right to transmit information between stations.
Of the thirty-two member FDDI standard symbol set, sixteen are data symbols (each representing 4 bits of ordinary binary data) and eight are control symbols. The eight control symbols are J (the first symbol of a start delimiter byte JK), K (the second symbol of a start delimiter byte JK), I (Idle), H (Halt), Q (Quiet), T (End Delimiter), S (Set) and R (Reset).
A continuous stream of control symbol patterns defines a line state. The FDDI protocol defines four line states:
(1) Idle Line State (ILS), which is a continuous stream of Idle symbols; PA1 (2) Quiet Line State (QLS), which is a continuous stream of Quiet symbols; PA1 (3) Halt Line State (HLS), which is a continuous stream of Halt symbols; and PA1 (4) Master Line State (MLS), which is a continuous stream of alternating Halt and Quiet symbols.
The remaining eight symbols of the FDDI standard symbol set are not used since they violate code run length or DC balance requirements of the protocol.
TABLE I ______________________________________ FDDI STANDARD SYMBOL SET SYMBOL CODE ______________________________________ 0 11110 1 01001 2 10100 3 10101 4 01010 5 01011 6 01110 7 01111 8 10010 9 10011 A 10110 B 10111 C 11010 D 11011 E 11100 F 11101 J 11000 K 10001 I 11111 H 00100 Q 00000 T 01101 S 11001 R 00111 ______________________________________
FIG. 1 shows the fields which are used within the FDDI frame and token formats. A preamble field (PA), which consists of a sequence of Idle line-state symbols, precedes every transmission. The Idle symbols provide a maximum frequency signal which is used for receive clock synchronization. The Start Delimiter field (SD) consists of a two symbol start delimiter pair which is uniquely recognizable independent of symbol boundaries. As stated above, the Start Delimiter byte establishes the boundaries for the information that follows. The Frame Control field (FC) defines the type of frame and its characteristics; it distinguishes synchronous from asynchronous transmission, specifies the length of the address and identifies the type of frame. The Frame Control field uniquely distinguishes a token. The Ending Delimiter field (ED) of a token consists of two end delimiter symbols and completes a token. The Destination Address (DA) and Source Address (SA) fields contain the destination and source addresses of the transmitted frame. The Destination Address field and the Source Address field are both either two bytes long or six bytes long, as determined by the Frame Control field. The Destination Address may be either an individual address or a group address. The Frame Check Sequence field (FCS), which is four bytes long, contains a cyclic redundancy check using a standard polynomial. The INFORMATION field, as is the case for all fields covered by the Frame Check Sequence check, consists only of data symbols. The End Delimiter of a frame is one end delimiter symbol (T), which is followed by the Frame Status field (FS) which consists of three control indicator symbols which indicate whether the addressed station has recognized its address, whether the frame has been copied, or whether any station has detected an error in the frame. The "T" followed by three control indicators represents the minimum end of frame sequence (EFS) required by the FDDI protocol for a non-token frame. The protocol allows for additional pairs of control symbols in the EFS or an additional odd number of control symbols followed by one last "T" symbol. All conforming implementations must be able to process these extended end of frame sequences without truncating them. The end delimiter "T" and the two control symbols "R" and "S" are uniquely encoded and distinguishable from either normal data or Idle symbols.
FIG. 2 shows the component functions necessary for a station to be in compliance with the FDDI protocol. The identified components include a Station Management function (SMT) which is a part of network management that resides in each station on the network to control the overall action of the station to ensure its proper operation as a member of the ring. A Physical Layer Medium Dependent (PMD) function provides the fiber-optic links between adjacent stations on the ring. A Physical Layer Protocol (PHY) function provides the encoding, decoding, clocking and synchronization functions. A Media Access Control (MAC) function controls access to the transmission medium, transmitting frames to and receiving frames from the Media Access Control function of other stations.
The PHY function simultaneously receives and transmits. The PHY function's transmit logic accepts symbols from the Media Access Control function, converts these symbols to 5-bit code-groups and transmits the encoded serial stream on the medium. The PHY function's receive logic receives the encoded serial stream from the medium, establishes symbol boundaries based on the recognition of a start delimiter symbol pair and forwards decoded symbols to its associated Media Access Control function.
Additional information regarding the FDDI protocol is presented by Floyd E. Ross, "FDDI--an Overview", Digest of Papers, Computer Soc. Intl. Conf., Compcon '87, pp. 434-444, which is hereby incorporated by reference to provide additional background information for the present invention.
A primary service of the FDDI PHY function is to ensure that information received from the fiber optic transmission medium is presented to the Media Access Control function in the most reliable, compact and timely manner.
One source of errors in received information results from the incoming data being corrupted along the transmission medium. Various subfunctions within the PHY function alert the Media Access Control function of possible data corruptions so that the Media Access Control function can discard corrupted frames and take other appropriate receiving actions.
Another source of errors in received information results from the transit of symbols between the PHY function and the Media Access Control function or other PHY functions. Since there are applications that involve physically locating the PHY functions and Media Access Control functions across different boards, potential corruptions can occur across busses, just as they can occur in any large system bus. To allow the detection of such errors, the information transferred between the PHY function and the Media Access Control function can be coded with a parity bit.
The FDDI protocol also requires that the PHY function monitor line states that result from the accumulation of certain received symbols. This line state monitoring information is reported to the Station Management function so that the Station Management function may take appropriate action.
U.S. Pat. No. 4,530,088, titled GROUP CODING SYSTEM FOR SERIAL DATA TRANSMISSION, issued July 16, 1985 to James R. Hamstra, co-inventor of the present invention, and Robert K. Moulton, discloses a system for encoding binary data and control signals serially transmitted between two or more communicating stations and which is applicable to FDDI networks. The system includes two registers: a data register that receives and stores input data groups and a control register that receives and stores input control codes. An input selector multiplexes the contents of the data and control registers to an encoding function. The encoded data and control groups are then provided to a shift register which applies them serially to a transmission medium.
According to another known PHY function implementation for transferring FDDI symbols from the FDDI fiber optic transmission medium to a Media Access Control function, Non-Return-to-Zero-Invert-on-One (NRZI) FDDI data serially received by the PHY function from the medium is first converted to Non-Return-to-Zero (NRZ) format. Then a shifter performs serial to 10-bit parallel conversion of the NRZ data. The 10-bit FDDI symbol pair is then parallel loaded into a framer. The framer detects patterns in the 10-bit binary combinations for establishing FDDI symbol boundaries as required. Each of the two FDDI symbols comprising the shifted 10-bit FDDI symbol pair is then parallel loaded into a register in a 4B/5B decoder. The decoder performs 4B/5B decoding for the two symbols and generates parity for the 10-bit decoded output. Framing and control logic associated with the framer generates timing pulses to load the two decoder registers and to write data from the decoder into an elasticity buffer. Data is then clocked from the elasticity buffer through a synchronization register. The synchronization register forces violation symbols into a receiver multiplexor under two conditions. The first condition is elasticity buffer overflow/underflow. The second condition occurs when line state decoder logic detects the presence of Quiet, Halt, Master, Idle or Noise Line States at the output of the synchronization register; detection of any one of these line states causes an invalid symbol to be sent out of the synchronization register. However, the invalid symbol does not identify the type of line state. The output of the synchronization register is made available via a smoothing function to a receiver bus for access by an associated Media Access Control function.